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Journals

  1. M. Ashtari Gargari, S. Tabrizchi, and A. Roohi*, “WinEdge: Low-Power Winograd CNN Execution with Transposed MRAM for Edge Devices,” Electronics, 2025.
  2. J. Perera, S. Balasubramaniam, S. Somathilaka, Q. Wen, X. Li, D. Kasthurirathna, A. Roohi*, and T.S. Nelson, “Wet-Neuromorphic Computing: A New Paradigm for Biological Artificial Intelligence,” IEEE Intelligent Systems, 2025.
  3. D. Najafi, H. E. Barkam, M. Morsali, S. Jeong, T. Das, A. Roohi, M. Nikdast, M. Imani, Sh. Angizi*„ “Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate,” IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI), 2025.
  4. S. Tabrizchi, M. Morsali, D. Pan, S. Angizi, and A. Roohi*, “PINSim: A Processing In- and Near-Sensor Simulator to Model Intelligent Vision Sensors,” IEEE Computer Architecture Letters, 2024.
  5. S. Tabrizchi, Rebati Gaire, Mehrdad Morsali, Maximilian Liehr, Nathaniel Cady, Shaahin Angizi, and A. Roohi*, “APRIS: Approximate Processing ReRAM In-Sensor Architecture Enabling Artificial- Intelligence-Powered Edge,” IEEE Transactions on Emerging Topics in Computing (TETC), 2024.
  6. S. Tabrizchi, B. Reidy, D. Najafi, Sh. Angizi, R. Zand, and A. Roohi*, “ViTSen: Bridging Vision Transformers and Edge Computing with Advanced In/Near-Sensor Processing,” IEEE Embedded Systems Letters (ESL), 2024.
  7. N. Taheri, S. Tabrizchi, and A. Roohi*, “Intermittent-Aware Design Exploration of Systolic Array Using Various Non-Volatile Memory: A Comparative Study,” Micromachines, 2024.
  8. D. Najafi, M. Morsali, R. Zhou, A. Roohi, A. Marshall, D. Misra, and Sh. Angizi*, “Enabling Normally-Off In Situ Computing With a Magneto-Electric FET-Based SRAM Design,” IEEE Transactions on Electron Devices, 71, no. 4, 2742-2748, 2024.
  9. A. Roohi*, S. Tabrizchi, M. Morsali, D. Pan, and Sh. Angizi, “PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.
  10. Sh. Angizi*, S. Tabrizchi, D. Pan, and A. Roohi*, “PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems,” IEEE Transactions on Emerging Topics in Computing, 2023.
  11. M. Morsali, S. Tabrizchi, A. Roohi , and Sh. Angizi*, “Design and Evaluation of a Near-Sensor Magneto-Electric FET-based Event Detector,” IEEE Transactions on Electron Devices, 2023.
  12. Sh. Angizi*, M. Morsali, S. Tabrizchi, and A. Roohi*, “A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks,” IEEE Transactions on Emerging Topics in Computing, 2023.
  13. S. Tabrizchi, A. Nezhadi, Sh. Angizi, and A. Roohi*, “AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023.
  14. R. Zhou, S. Tabrizchi, A. Roohi, and Sh. Angizi*, “LT-PIM: An LUT-based Processing-in-DRAM Architecture with RowHammer Self-Tracking,” IEEE Computer Architecture Letters, 2022.
  15. S. Tabrizchi, Sh. Angizi, and A. Roohi*, “Ocelli: Efficient Processing-in-Pixel Array Enabling Edge Inference of Ternary Neural Networks,” Journal of Low Power Electronics and Applications, 2022.
  16. N. Khoshavi*, M. Maghsoudloo, A. Roohi, S. Sargolzaei, and B. Yu, “HARDeNN: Hardware-assisted Attack-resilient Deep Neural Network Architectures,” Microprocessors & Microsystems, 2022.
  17. M. Abedin, A. Roohi*, M. Liehr, N. Cady, and Sh. Angizi*, “MR-PIPA: An Integrated Multi-level RRAM (HfOx) based Processing-In-Pixel Accelerator,” IEEE Journal on Exploratory Solid-State. Computational Devices and Circuits, 2022 (Featured Paper)
  18. M. Alali*, A. Roohi*, Sh. Angizi, and J. S. Deogun, “Enabling Intelligent IoTs for Histopathology. Image Analysis Using Convolutional Neural Networks,” Micromachines, 13, no. 8, 2022.
  19. A. Roohi*, Sh. Angizi, Sh. Sheikhfaal, D. Fan, and R. F. DeMara, “ApGAN: Approximate GAN for Robust Low-Energy Learning from Imprecise Components,” IEEE Transactions on Computers, October 2019.
  20. A. Roohi*, and R. F. DeMara, “PARC: A Novel Design Methodology for Power Analysis Resilient Circuits Using Spintronics,” IEEE Transactions on Nanotechnology, August 2019.
  21. A. Roohi*, and R. F. DeMara, “NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths,” IEEE Transactions on Computers, vol. 67, no. 7, pp. 949-959, July 2018.
  22. R. Zand*, A. Roohi, and R. F. DeMara, “Energy-Efficient and Process-Variation-Resilient Write Circuit Schemes for Spin Hall Effect MRAM Device,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 9, pp. 2394-2401, Sept. 2017.
  23. A. Roohi*, R. Zand, D. Fan, and R. F. DeMara, “Voltage-based Concatenatable Full Adder using Spin Hall Effect Switching,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 12, pp. 2134-2138, Dec. 2017.
  24. M. K.Krishna, A. Roohi, R. Zand, D. Fan, and R. F. DeMara*, “Heterogeneous Energy-Sparing Reconfigurable Logic: Spin-based Storage and CNFET-based Multiplexing,” IET Circuits, Devices & Systems, vol. 11, no. 3, pp. 274-279, 5 2017.
  25. R. Zand, A. Roohi, D. Fan, and R. F. DeMara*, “Energy-Efficient Nonvolatile Reconfigurable Logic using Spin Hall Effect-based Lookup Tables,” IEEE Transactions on Nanotechnology, vol. 16, no. 1, pp. 32-43, Jan. 2017.
  26. A.M. Chabi, A. Roohi, H. Khademolhosseini, Sh. Sheikhfaal, Sh. Angizi, K. Navi, and R. F. DeMara*, Towards Ultra-efficient QCA Reversible Circuits,” Microprocessors and Microsystems, Volume 49, Pages 127-138, 2017.
  27. A. Roohi*, R. Zand, Sh. Angizi, and R. F. DeMara, “A Parity-Preserving Reversible QCA Gate with Self-Checking Cascadable Resiliency,” IEEE Transactions on Emerging Topics in Computing, Special Issue on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, vol. 6, no. 4, pp. 450-459, 2016. (December 2018 Featured Paper, paper of the month)
  28. A. Roohi*, R. Zand, and R. F. DeMara, “A Tunable Majority Gate based Full Adder using Current-Induced Domain Wall Nanomagnets,” IEEE Transactions on Magnetics 52 (8), 2016.
  29. R. Zand, A. Roohi, S. Salehi, and R. F. DeMara*, “Scalable Adaptive Spintronic Reconfigurable Logic using Area-Matched MTJ Design,” IEEE Transactions on Circuits and Systems II: Express Briefs 63 (7), 678 – 682, 2016.
  30. H. Shabani, A. Roohi, A. Reza, M. Reshadi, N. Bagherzadeh, and R. F. DeMara*, “Loss-Aware Switch Design and Non-Blocking Detection Algorithm for Intra-Chip Scale Photonic Interconnection Networks,” IEEE Transactions on Computers, 65 (6), 1789-1801, 2016. (June 2016 Featured Paper, paper of the month)
  31. A. Roohi*, H. Thapliyal, and R. F. DeMara, “Wire Crossing Constrained QCA Circuit Design using Bilayer Logic Decomposition,” IET Electronics Letters, Vol 51, No. 21, P. 1677, 2015.
  32. Sh. Angizi*, S. Sayedsalehi, A. Roohi, N. Bagherzadeh, K. Navi, “Design and verification of new n-bit quantum-dot synchronous counters using majority function-based JK flip-flops,” Journal of Circuits, Systems and Computers, Vol 24, No. 10, P. 1550153, 2015.
  33. A. Roohi*, R. F. DeMara, and N. Khoshavi, ‘‘Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder,” Microelectronics Journal, Vol 46, No. 6, P. 531, 2015.
  34. A. Roohi*, H. Khademolhosseini, S. Sayedsalehi, and K. Navi, ‘‘A Symmetric Quantum-dot Cellular Automata Design for 5-input Majority Gate,” Journal of Computational Electronics, Vol 13, No. 3, P. 701, 2014.
  35. A. Roohi*, H. Khademolhosseini, ‘‘Quantum-Dot Cellular Automata: Computing in Nanoscale,” Reviews In Theoretical Science (RITS), Vol 2, No. 1, P. 46, 2014.
  36. H. Shabani*, A. Roohi*, A. Reza, H. Khademolhosseini, and M. Reshadi, ‘‘Parallel-XY: a novel loss-aware non-blocking photonic router for silicon nano-photonic networks-on-chip,” Journal of
  37. Computational and Theoretical Nanoscience, Vol.10, No.6, P. 1510, 2013.
    K. Navi*, A. Roohi, and S. Sayedsalehi, ‘‘Designing Reconfigurable Quantum-dot Cellular Automata Logic Circuits,” Journal of Computational and Theoretical Nanoscience, Vol.10, No.5, P. 1137, 2013.
  38. A. Roohi, S. Sayedsalehi, H. Khademolhosseini, and K. Navi*, ‘‘Design and Evaluation of a Reconfigurable Fault Tolerant Quantum-dot Cellular Automata Gate,” Journal of Computational and Theoretical Nanoscience, Vol.10, No.2, P. 380, 2013.
  39. S. Sayedsalehi, A. Roohi, and K. Navi*, ‘‘A different design approach for high performance in nanostructure using Quantum Cellular Automata,” Canadian Journal on Electrical and Electronics Engineering, Vol.2, No.11, P. 526, 2011.
  40. A. Roohi, H. Khademolhosseini, S. Sayedsalehi, and K. Navi*, ‘‘A Novel Architecture for Quantum- Dot Cellular Automata Multiplexer,” International Journal of Computer Science Issues, Vol.8, No.6, P. 55, 2011.